DOI: 10.1143/jjap.40.2917. Low Voltage Operation of Nonvolatile Metal-Ferroelectric-Metal-Insulator-Semiconductor (MFMIS)-Field-Effect-Transistors (FETs) Using Pt/SrBi2Ta2O9/Pt/SrTa2O6/SiON/Si Structures

Low Voltage Operation of Nonvolatile Metal-Ferroelectric-Metal-Insulator-Semiconductor (MFMIS)-Field-Effect-Transistors (FETs) Using Pt/SrBi2Ta2O9/Pt/SrTa2O6/SiON/Si Structures

10.1143/jjap.40.2917

Crossref journal-article

IOP Publishing

Japanese Journal of Applied Physics (266)

Abstract

We report p-channel metal-ferroelectric-metal-insulator-semiconductor (MFMIS)-field-effect-transistors (FETs) which can operate at a voltage as low as 3.5 V using Pt/SrBi2Ta2O9/Pt/SrTa2O6/SiON/Si structures. It is shown that the use of the saturated P–E hysteresis loop is effective to improve the data retention time. To utilize the saturated P–E loop, MFMIS-FETs with a large S M/S F ratio are fabricated. We demonstrate the nonvolatile memory function of the p-channel MFMIS-FETs with a memory window of 1.5 V, operating at ±3.5 V. It was also found that the fabricated MFMIS-FETs have fairly good data retention characteristics.

Bibliography

Tokumitsu, E., Okamoto, K., & Ishiwara, H. (2001). Low Voltage Operation of Nonvolatile Metal-Ferroelectric-Metal-Insulator-Semiconductor (MFMIS)-Field-Effect-Transistors (FETs) Using Pt/SrBi2Ta2O9/Pt/SrTa2O6/SiON/Si Structures. Japanese Journal of Applied Physics, 40(4S), 2917.

Authors 3

Eisuke Tokumitsu (first)
Kojiro Okamoto (additional)
Hiroshi Ishiwara (additional)

References 16 Referenced 54

{'key': ''}
{'key': '', 'first-page': '333', 'volume': 'ED-10', 'year': '1963', 'journal-title': 'IEEE Trans. Electron Devices'} / IEEE Trans. Electron Devices (1963)
10.1063/1.322014 / J. Appl. Phys. (1975)
10.1143/JJAP.17S1.209 / Proc. 9th Conf. Solid State Devices, Tokyo 1977, Jpn. J. Appl. Phys. (1978)
10.1143/JJAP.32.442 / Jpn. J. Appl. Phys. (1993)
10.1143/JJAP.38.2289 / Jpn. J. Appl. Phys. (1999)
10.1557/PROC-493-459 / Mater. Res. Symp. Proc. (1998)
10.1063/1.124446 / Appl. Phys. Lett. (1999)
{'key': ''}
10.1143/JJAP.36.5908 / Jpn. J. Appl. Phys. (1997)
10.1080/10584589508019351 / Integr. Ferroelectr. (1995)
10.1143/JJAP.38.2285 / Jpn. J. Appl. Phys. (1999)
10.1109/55.563315 / IEEE Electron Device Lett. (1997)
10.1063/1.126424 / Appl. Phys. Lett. (2000)
10.1143/JJAP.39.2125 / Jpn. J. Appl. Phys. (2000)
10.1063/1.351910 / J. Appl. Phys. (1992)

Dates

Type	When
Created	22 years, 10 months ago (Oct. 1, 2002, 4:30 p.m.)
Deposited	2 years, 8 months ago (Dec. 19, 2022, 11:26 a.m.)
Indexed	4 months, 4 weeks ago (March 24, 2025, 2:35 a.m.)
Issued	24 years, 4 months ago (April 1, 2001)
Published	24 years, 4 months ago (April 1, 2001)
Published Print	24 years, 4 months ago (April 1, 2001)

Funders 0

None

BibTeX

@article{Tokumitsu_2001, title={Low Voltage Operation of Nonvolatile Metal-Ferroelectric-Metal-Insulator-Semiconductor (MFMIS)-Field-Effect-Transistors (FETs) Using Pt/SrBi2Ta2O9/Pt/SrTa2O6/SiON/Si Structures}, volume={40}, ISSN={1347-4065}, url={http://dx.doi.org/10.1143/jjap.40.2917}, DOI={10.1143/jjap.40.2917}, number={4S}, journal={Japanese Journal of Applied Physics}, publisher={IOP Publishing}, author={Tokumitsu, Eisuke and Okamoto, Kojiro and Ishiwara, Hiroshi}, year={2001}, month=apr, pages={2917} }

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