DOI: 10.1109/vlsit.2015.7223678. Device design guideline for steep slope ferroelectric FET using negative capacitance in sub-0.2V operation: Operation speed, material requirement and energy efficiency

Device design guideline for steep slope ferroelectric FET using negative capacitance in sub-0.2V operation: Operation speed, material requirement and energy efficiency

10.1109/vlsit.2015.7223678

Crossref proceedings-article

IEEE

2015 Symposium on VLSI Technology (VLSI Technology) (263)

Bibliography

Kobayashi, M., & Hiramoto, T. (2015). Device design guideline for steep slope ferroelectric FET using negative capacitance in sub-0.2V operation: Operation speed, material requirement and energy efficiency. 2015 Symposium on VLSI Technology (VLSI Technology), T212âT213.

Authors 2

Masaharu Kobayashi (first)
Toshiro Hiramoto (additional)

References 10 Referenced 30

{'key': 'ref4', 'first-page': '242905', 'volume': '102', 'author': 'park', 'year': '2013', 'journal-title': 'APL'} / APL by park (2013)
{'key': 'ref3', 'first-page': '255', 'author': 'khan', 'year': '0', 'journal-title': 'IEDM 2011'} / IEDM 2011 by khan (0)
10.7567/JJAP.53.09PA04 / JJAP by shimizu (2014)
10.1002/adfm.201103119
{'key': 'ref5', 'first-page': '72902', 'volume': '105', 'author': 'park', 'year': '2014', 'journal-title': 'APL'} / APL by park (2014)
{'key': 'ref8', 'first-page': '102903', 'volume': '99', 'author': 'boscke', 'year': '2011', 'journal-title': 'APL'} / APL by boscke (2011)
10.1021/nl302049k / Nano Lett by muller (2012)
{'key': 'ref2', 'first-page': '693', 'author': 'salahuddin', 'year': '0', 'journal-title': 'IEDM 2008'} / IEDM 2008 by salahuddin (0)
{'key': 'ref9', 'first-page': '547', 'author': 'boscke', 'year': '0', 'journal-title': 'IEDM 2011'} / IEDM 2011 by boscke (0)
{'key': 'ref1', 'first-page': '559', 'author': 'fuketa', 'year': '0', 'journal-title': 'IEDM 2011'} / IEDM 2011 by fuketa (0)

Dates

Type	When
Created	9 years, 11 months ago (Aug. 27, 2015, 5:50 p.m.)
Deposited	1 year, 2 months ago (June 10, 2024, 3:48 p.m.)
Indexed	9 months, 4 weeks ago (Oct. 23, 2024, 2:49 a.m.)
Issued	10 years, 2 months ago (June 1, 2015)
Published	10 years, 2 months ago (June 1, 2015)
Published Print	10 years, 2 months ago (June 1, 2015)

Funders 0

None

BibTeX

@inproceedings{Kobayashi_2015, title={Device design guideline for steep slope ferroelectric FET using negative capacitance in sub-0.2V operation: Operation speed, material requirement and energy efficiency}, url={http://dx.doi.org/10.1109/vlsit.2015.7223678}, DOI={10.1109/vlsit.2015.7223678}, booktitle={2015 Symposium on VLSI Technology (VLSI Technology)}, publisher={IEEE}, author={Kobayashi, Masaharu and Hiramoto, Toshiro}, year={2015}, month=jun, pages={T212–T213} }

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