Crossref journal-article
Institute of Electrical and Electronics Engineers (IEEE)
IEEE Transactions on Nanotechnology (263)
Bibliography

Chen, L.-J., Wu, Y.-C., Chiang, J.-H., Hung, M.-F., Chang, C.-W., & Su, P.-W. (2011). Comprehensive Study of Pi-Gate Nanowires Poly-Si TFT Nonvolatile Memory With an HfO $_2$ Charge Trapping Layer. IEEE Transactions on Nanotechnology, 10(2), 260–265.

Authors 6
  1. Lun-Jyun Chen (first)
  2. Yung-Chun Wu (additional)
  3. Ji-Hong Chiang (additional)
  4. Min-Feng Hung (additional)
  5. Chin-Wei Chang (additional)
  6. Po-Wen Su (additional)
References 21 Referenced 19
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  19. 10.1109/LED.2003.810888
  20. {'key': 'ref20', 'first-page': '927', 'article-title': '2-bit Poly-Si-TFT nonvolatile memory using hafnium oxide, hafnium silicate and zirconium silicate', 'author': 'lin', 'year': '2005', 'journal-title': 'Proc IEDM Tech Dig'} / Proc IEDM Tech Dig / 2-bit Poly-Si-TFT nonvolatile memory using hafnium oxide, hafnium silicate and zirconium silicate by lin (2005)
  21. 10.1116/1.2174021
Dates
Type When
Created 15 years, 7 months ago (Jan. 12, 2010, 3:32 p.m.)
Deposited 3 years, 10 months ago (Oct. 10, 2021, 8:45 p.m.)
Indexed 4 weeks, 1 day ago (July 23, 2025, 8:43 a.m.)
Issued 14 years, 5 months ago (March 1, 2011)
Published 14 years, 5 months ago (March 1, 2011)
Published Print 14 years, 5 months ago (March 1, 2011)
Funders 0

None

@article{Chen_2011, title={Comprehensive Study of Pi-Gate Nanowires Poly-Si TFT Nonvolatile Memory With an HfO $_2$ Charge Trapping Layer}, volume={10}, ISSN={1941-0085}, url={http://dx.doi.org/10.1109/tnano.2009.2038479}, DOI={10.1109/tnano.2009.2038479}, number={2}, journal={IEEE Transactions on Nanotechnology}, publisher={Institute of Electrical and Electronics Engineers (IEEE)}, author={Chen, Lun-Jyun and Wu, Yung-Chun and Chiang, Ji-Hong and Hung, Min-Feng and Chang, Chin-Wei and Su, Po-Wen}, year={2011}, month=mar, pages={260–265} }