Bibliography
Inoue, Kotani, Yamada, Yamauchi, Fujiwara, Matsushima, Akamatsu, Fukumoto, Kubota, Nakao, Aoi, Fuse, Ogawa, Odanaka, Ueno, & Yamamoto. (1988). A 16mb Dram with an Open Bit-Line Architecture. 1988 IEEE International Solid-State Circuits Conference, 1988 ISSCC. Digest of Technical Papers, 246.
Authors
16
- Inoue (first)
- Kotani (additional)
- Yamada (additional)
- Yamauchi (additional)
- Fujiwara (additional)
- Matsushima (additional)
- Akamatsu (additional)
- Fukumoto (additional)
- Kubota (additional)
- Nakao (additional)
- Aoi (additional)
- Fuse (additional)
- Ogawa (additional)
- Odanaka (additional)
- Ueno (additional)
- Yamamoto (additional)
References
5
Referenced
26
{'key': 'ref4', 'first-page': '11', 'article-title': 'SCC(Surrounded Capacitor Cell) Structure for DRAM', 'author': 'fuse', 'year': '1987', 'journal-title': 'Extended Abstracts 17th Conf Solid State Device Materials'}
/ Extended Abstracts 17th Conf Solid State Device Materials / SCC(Surrounded Capacitor Cell) Structure for DRAM by fuse (1987){'key': 'ref3', 'article-title': '4Mb DRAM Design Including 16b Concurrent ECC', 'author': 'kotani', 'year': '1987', 'journal-title': 'Symposium on VLSI Circuits Digest of Technical Papers'}
/ Symposium on VLSI Circuits Digest of Technical Papers / 4Mb DRAM Design Including 16b Concurrent ECC by kotani (1987){'key': 'ref5', 'article-title': 'A 128K Word x 8b DRAM', 'author': 'suzuki', 'year': '1984', 'journal-title': 'ISSCC Digest of Technical Papers'}
/ ISSCC Digest of Technical Papers / A 128K Word x 8b DRAM by suzuki (1984)10.1109/ISSCC.1987.1157158
10.1109/JSSC.1986.1052586
Dates
Type | When |
---|---|
Created | 19 years, 11 months ago (Aug. 24, 2005, 12:50 p.m.) |
Deposited | 8 years, 5 months ago (March 8, 2017, 12:16 p.m.) |
Indexed | 11 months, 2 weeks ago (Sept. 7, 2024, 12:40 a.m.) |
Issued | 37 years, 7 months ago (Jan. 1, 1988) |
Published | 37 years, 7 months ago (Jan. 1, 1988) |
Published Print | 37 years, 7 months ago (Jan. 1, 1988) |
@inproceedings{Inoue_1988, title={A 16mb Dram with an Open Bit-Line Architecture}, url={http://dx.doi.org/10.1109/isscc.1988.663712}, DOI={10.1109/isscc.1988.663712}, booktitle={1988 IEEE International Solid-State Circuits Conference, 1988 ISSCC. Digest of Technical Papers}, publisher={IEEE}, author={Inoue and Kotani and Yamada and Yamauchi and Fujiwara and Matsushima and Akamatsu and Fukumoto and Kubota and Nakao and Aoi and Fuse and Ogawa and Odanaka and Ueno and Yamamoto}, year={1988}, pages={246} }