DOI: 10.1109/iedm.2009.5424295. VMR: VLSI-compatible metallic carbon nanotube removal for imperfection-immune cascaded multi-stage digital logic circuits using Carbon Nanotube FETs

VMR: VLSI-compatible metallic carbon nanotube removal for imperfection-immune cascaded multi-stage digital logic circuits using Carbon Nanotube FETs

10.1109/iedm.2009.5424295

Crossref proceedings-article

IEEE

2009 IEEE International Electron Devices Meeting (IEDM) (263)

Bibliography

Patil, N., Lin, A., Zhang, J., Hai Wei, Anderson, K., Wong, H.-S. P., & Mitra, S. (2009). VMR: VLSI-compatible metallic carbon nanotube removal for imperfection-immune cascaded multi-stage digital logic circuits using Carbon Nanotube FETs. 2009 IEEE International Electron Devices Meeting (IEDM), 1â4.

Authors 7

Nishant Patil (first)
Albert Lin (additional)
Jie Zhang (additional)
Hai Wei (additional)
Kyle Anderson (additional)
H. -S. Philip Wong (additional)
Subhasish Mitra (additional)

References 20 Referenced 80

10.1088/0957-4484/19/29/295202
{'journal-title': 'Proc Symp VLSI Technology', 'year': '2009', 'author': 'lin', 'key': 'ref11'} / Proc Symp VLSI Technology by lin (2009)
10.1126/science.1122797 / Science by chen (2006)
{'key': 'ref13', 'first-page': '31.2.1', 'author': 'javey', 'year': '2003', 'journal-title': 'Proc IEDM'} / Proc IEDM by javey (2003)
10.1038/nature07110 / Nature by cao (2008)
10.1021/nl803496s
10.1021/nl025647r
10.1109/TCAD.2008.2003278
{'year': '0', 'key': 'ref18'} (0)
{'journal-title': 'Logic Design Principles', 'year': '1986', 'author': 'mccluskey', 'key': 'ref19'} / Logic Design Principles by mccluskey (1986)
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10.1126/science.1058782 / Science by collins (2001)
10.1126/science.1133781 / Science by zhang (2006)
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10.1038/nnano.2007.77
{'key': 'ref2', 'first-page': '1009', 'author': 'zhang', 'year': '2008', 'journal-title': 'Proc DATE'} / Proc DATE by zhang (2008)
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10.1109/TNANO.2009.2016562
10.1021/nl035097c

Dates

Type	When
Created	15 years, 4 months ago (March 30, 2010, 11:44 a.m.)
Deposited	8 years, 2 months ago (June 18, 2017, 10:42 p.m.)
Indexed	3 weeks ago (July 30, 2025, 8:28 p.m.)
Issued	15 years, 8 months ago (Dec. 1, 2009)
Published	15 years, 8 months ago (Dec. 1, 2009)
Published Print	15 years, 8 months ago (Dec. 1, 2009)

Funders 0

None

BibTeX

@inproceedings{Patil_2009, title={VMR: VLSI-compatible metallic carbon nanotube removal for imperfection-immune cascaded multi-stage digital logic circuits using Carbon Nanotube FETs}, url={http://dx.doi.org/10.1109/iedm.2009.5424295}, DOI={10.1109/iedm.2009.5424295}, booktitle={2009 IEEE International Electron Devices Meeting (IEDM)}, publisher={IEEE}, author={Patil, Nishant and Lin, Albert and Zhang, Jie and Hai Wei and Anderson, Kyle and Wong, H. -S. Philip and Mitra, Subhasish}, year={2009}, month=dec, pages={1–4} }

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