Abstract
When linear voltage ramps were applied to MOS capacitors, the current-vs-voltage (I-V) curves indicated a region of quasisaturation of current, i.e., a ledge in the I-V characteristic. These ledges could be explained by an electron-trapping model. Trap cross sections and concentrations were dependent on sample processing and oxide thickness and were in the 10−19 cm2 and 1012 cm−2 ranges, respectively. Comparison of shifts in the I-V and C-V curves showed that trapped charge to be within about 10 Å of the Si-SiO2 interface.
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Dates
Type | When |
---|---|
Created | 22 years, 6 months ago (Feb. 14, 2003, 4:28 p.m.) |
Deposited | 1 year, 7 months ago (Feb. 4, 2024, 3:07 p.m.) |
Indexed | 1 year, 2 months ago (July 5, 2024, 7:09 p.m.) |
Issued | 48 years ago (Sept. 1, 1977) |
Published | 48 years ago (Sept. 1, 1977) |
Published Print | 48 years ago (Sept. 1, 1977) |
@article{Solomon_1977, title={High-field electron trapping in SiO2}, volume={48}, ISSN={1089-7550}, url={http://dx.doi.org/10.1063/1.324253}, DOI={10.1063/1.324253}, number={9}, journal={Journal of Applied Physics}, publisher={AIP Publishing}, author={Solomon, P.}, year={1977}, month=sep, pages={3843–3849} }