Abstract
We demonstrate a three-terminal magnetic nanowire logic junction that combines logical NOT and signal fan-out operations. The behavior and performance of the three-terminal device are similar to those of previous two-terminal NOT gates. However, the third terminal provides an additional, noninverted output. We have demonstrated the versatility that this brings by integrating a chain of the three-terminal hybrid elements with other nanowire logic elements to create a serial-in parallel-out shift register.
References
12
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Dates
Type | When |
---|---|
Created | 18 years, 11 months ago (Sept. 6, 2006, 6:12 p.m.) |
Deposited | 2 years, 1 month ago (July 2, 2023, 5:33 p.m.) |
Indexed | 4 weeks, 2 days ago (July 30, 2025, 6:48 a.m.) |
Issued | 18 years, 11 months ago (Sept. 4, 2006) |
Published | 18 years, 11 months ago (Sept. 4, 2006) |
Published Online | 18 years, 11 months ago (Sept. 6, 2006) |
Published Print | 18 years, 11 months ago (Sept. 4, 2006) |
@article{Allwood_2006, title={Magnetic domain wall serial-in parallel-out shift register}, volume={89}, ISSN={1077-3118}, url={http://dx.doi.org/10.1063/1.2345032}, DOI={10.1063/1.2345032}, number={10}, journal={Applied Physics Letters}, publisher={AIP Publishing}, author={Allwood, D. A. and Xiong, Gang and Cowburn, R. P.}, year={2006}, month=sep }