Abstract
We demonstrate the efficacy of diblock copolymer self assembly for solving key fabrication challenges of aggressively scaled silicon field effect transistors. These materials spontaneously form nanometer-scale patterns that self-align to larger-scale lithography, enabling construction of sub-lithographic semiconducting transistor channels composed of arrays of parallel nanowires with critical dimensions (15 nm width, 40 nm pitch) defined by self assembly. The number of nanowires in the arrays is readily adjusted, greatly reducing the complexity associated with width-scaling of nanowire transistors. We measured Schottky source/drain multi-nanowire n-channel devices comprised of 6, 8, 10, and 16 nanowires, with current drives of ∼5μA∕wire and current on/off ratios of ∼105.
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Dates
Type | When |
---|---|
Created | 19 years, 10 months ago (Oct. 12, 2005, 6:20 p.m.) |
Deposited | 2 years, 1 month ago (July 31, 2023, 6:56 p.m.) |
Indexed | 1 month ago (July 30, 2025, 6:46 a.m.) |
Issued | 19 years, 10 months ago (Oct. 13, 2005) |
Published | 19 years, 10 months ago (Oct. 13, 2005) |
Published Online | 19 years, 10 months ago (Oct. 13, 2005) |
Published Print | 19 years, 10 months ago (Oct. 17, 2005) |
@article{Black_2005, title={Self-aligned self assembly of multi-nanowire silicon field effect transistors}, volume={87}, ISSN={1077-3118}, url={http://dx.doi.org/10.1063/1.2112191}, DOI={10.1063/1.2112191}, number={16}, journal={Applied Physics Letters}, publisher={AIP Publishing}, author={Black, C. T.}, year={2005}, month=oct }