Abstract
Polyimide gate dielectric layers cured at 180 °C have been employed to fabricate high-quality pentacene field-effect transistors on polyethylenenaphthalate-based films. The surface roughness (root-mean square) of gate dielectric layers characterized by atomic force microscopy is only 0.2 nm, while that of the base film is 1 nm. The transistors with pentacene channel layers deposited on 990 nm polyimide gate dielectric layers attain the on/off ratio of 106 and mobility of 0.3 cm2/V s. Furthermore, by decreasing the thickness of polyimide gate dielectric layers down to 540 nm, the mobility is enhanced up to 1 cm2/V s.
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Dates
Type | When |
---|---|
Created | 21 years, 3 months ago (May 3, 2004, 6:15 p.m.) |
Deposited | 1 year, 6 months ago (Feb. 3, 2024, 10:02 p.m.) |
Indexed | 4 months, 2 weeks ago (April 15, 2025, 2:11 a.m.) |
Issued | 21 years, 3 months ago (May 10, 2004) |
Published | 21 years, 3 months ago (May 10, 2004) |
Published Print | 21 years, 3 months ago (May 10, 2004) |
@article{Kato_2004, title={High mobility of pentacene field-effect transistors with polyimide gate dielectric layers}, volume={84}, ISSN={1077-3118}, url={http://dx.doi.org/10.1063/1.1739508}, DOI={10.1063/1.1739508}, number={19}, journal={Applied Physics Letters}, publisher={AIP Publishing}, author={Kato, Yusaku and Iba, Shingo and Teramoto, Ryohei and Sekitani, Tsuyoshi and Someya, Takao and Kawaguchi, Hiroshi and Sakurai, Takayasu}, year={2004}, month=may, pages={3789–3791} }