Abstract
Decreasing the oxide thickness in carbon nanotube field-effect transistors (CNFETs) improves the turn-on behavior. However, we demonstrate that this also requires scaling the range of the drain voltage. This scaling is needed to avoid an exponential increase in off-current with drain voltage, due to modulation of the Schottky barriers at both the source and drain contact. We illustrate this with results for bottom-gated ambipolar CNFETs with oxides of 2 and 5 nm, and give an explicit scaling rule for the drain voltage. Above the drain voltage limit, the off-current becomes large and has equal electron and hole contributions. This allows the recently reported light emission from appropriately biased CNFETs.
References
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Dates
Type | When |
---|---|
Created | 21 years, 11 months ago (Sept. 18, 2003, 6:55 p.m.) |
Deposited | 1 year, 6 months ago (Feb. 3, 2024, 8:28 p.m.) |
Indexed | 4 months, 1 week ago (April 17, 2025, 1:49 a.m.) |
Issued | 21 years, 11 months ago (Sept. 22, 2003) |
Published | 21 years, 11 months ago (Sept. 22, 2003) |
Published Print | 21 years, 11 months ago (Sept. 22, 2003) |
@article{Radosavljevi__2003, title={Drain voltage scaling in carbon nanotube transistors}, volume={83}, ISSN={1077-3118}, url={http://dx.doi.org/10.1063/1.1610791}, DOI={10.1063/1.1610791}, number={12}, journal={Applied Physics Letters}, publisher={AIP Publishing}, author={Radosavljević, M. and Heinze, S. and Tersoff, J. and Avouris, Ph.}, year={2003}, month=sep, pages={2435–2437} }