Abstract
A silicon-based scanning probe with a field effect transistor (FET) has been developed. The FET is integrated onto an atomic force microscope cantilever with a sharpened tip. The commonly used complementary-metal–oxide–semiconductor process has been employed to construct the FET using a silicon-on-insulator wafer. The probe is used to measure a surface potential with a resolution of <300 nm when determined by the edge of patterned SiO2 islands. The probe can be also used to detect local properties on semiconductor surfaces, such as isolated charge distributions on a surface or at subsurface.
References
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Dates
Type | When |
---|---|
Created | 22 years, 1 month ago (July 10, 2003, 6:28 p.m.) |
Deposited | 1 year, 7 months ago (Feb. 3, 2024, 7:56 p.m.) |
Indexed | 1 year, 1 month ago (July 20, 2024, 2:10 p.m.) |
Issued | 22 years, 1 month ago (July 14, 2003) |
Published | 22 years, 1 month ago (July 14, 2003) |
Published Print | 22 years, 1 month ago (July 14, 2003) |
@article{Suh_2003, title={Silicon-based field-effect-transistor cantilever for surface potential mapping}, volume={83}, ISSN={1077-3118}, url={http://dx.doi.org/10.1063/1.1591231}, DOI={10.1063/1.1591231}, number={2}, journal={Applied Physics Letters}, publisher={AIP Publishing}, author={Suh, Moon Suhk and Choi, J. H. and Kuk, Young and Jung, J.}, year={2003}, month=jul, pages={386–388} }